1. Technical Field
The present invention relates to a nonvolatile memory apparatus, and more particularly, to a technology for processing a plurality of configuration data groups stored in a configuration information storage block.
2. Related Art
A flash memory apparatus as a kind of nonvolatile memory apparatus includes a configuration information storage block for storing a plurality of configuration data groups. The configuration information storage block is assigned to a specified block of a memory device and is composed of a plurality of nonvolatile memory cells. For reference, such a configuration information storage block is called a code address memory (CAM).
Each of the plurality of configuration data groups, which are stored in the configuration information storage block, includes any one of internal bias information, internal logic configuration information, failed address information, and redundancy information. In a power-up operation period when power is first applied to a nonvolatile memory apparatus and power initialization is performed, the plurality of configuration data groups, which are stored in the configuration information storage block, are detected and outputted by a page buffer. At this time, a process for determining majorities of the plurality of configuration data groups outputted from the page buffer is performed, and determination results are stored as a plurality of configuration signals. “Majorities” or “majority” may be defined as having a majority of bits that are logical “1” in a group of bits. The group of bits may be, for example, 4 bits or 8 bits.
For reference, when each of the configuration data groups is programmed to the configuration information storage block, all the respective data of each configuration data group are programmed as the same value for increased reliability. For example, when assuming that one configuration data group is composed of 8-bit configuration data, eight ‘1’s are programmed to the configuration information storage block by being copied. When the page buffer detects and outputs the configuration data group stored in the configuration information storage block, output data can be outputted with various values such as ‘1111 1111’, ‘1111 1000’, etc. depending upon a programmed state and detection capability. A final data value is detected by determining a majority of 8-bit data signals which are outputted. That is to say, ‘1’ is determined as a final data value if the majority of 8-bit data signals has the value of ‘1.’ Otherwise, ‘0’ is determined as a final data value.
Configuration information processing may be performed in this way during the power-up operation period. In this regard, in the case where the number of the plurality of configuration data groups is substantial, a lengthy time for processing configuration information is required every time power is initialized. Thus, a technology for solving this problem is demanded in the art.